sgherbst

// adapted from serde_json example: https://stackoverflow.com/a/39147207

extern crate serde_yaml;
use serde_yaml::{Value, Mapping, Number};

fn main() {
    let mut map = Mapping::new();
    build_mapping(&mut map, 1);
    println!("{}", serde_yaml::to_string(&map).unwrap());
    // ---

sgherbst

// adapted from serde_json example: https://stackoverflow.com/a/39147207

extern crate serde_yaml;
use serde_yaml::{Value, Mapping, Number};

fn main() {
    let mut map = Mapping::new();
    build_mapping(&mut map, 1);
    println!("{}", serde_yaml::to_string(&map).unwrap());
    // ---

sgherbst

// adapted from serde_json example: https://stackoverflow.com/a/39147207

extern crate serde_yaml;
use serde_yaml::{Value, Mapping, Number};

fn main() {
    let mut inner_map = Mapping::new();
    inner_map.insert(Value::String("x".to_string()), Value::Number(Number::from(10u64)));
    inner_map.insert(Value::String("y".to_string()), Value::Number(Number::from(20u64)));

sgherbst

// top.sv
module my_module (
    input i_clk,
    output o_clk
);
endmodule

module top (
  input logic i_clk,
  output logic [1:0] o_clks

sgherbst

{
  "name": "$root",
  "kind": "Root",
  "addr": 140418817750560,
  "members": [
    {
      "name": "",
      "kind": "CompilationUnit",
      "addr": 140418822058456
    },

sgherbst

Prerequisites

1. If you haven't already, create a free Xilinx account.

Installing Vivado HLx 2020.1

1. On your local machine, download the Xilinx Unified Installer 2020.1 Linux Self Extracting Web Installer (you'll have to login with your Xilinx account to do this).
2. Make the Vivado installer executable and run it:

> chmod +x Xilinx_Unified_2020.1*.bin
> sudo ./Xilinx_Unified_2020.1*.bin

sgherbst

1. Launch Synplify Premier:

> module load base synplify
> synplify_premier

2. Import RTL and constraints with File → Build Project
3. Open compile options with Options → Configure Verilog Compiler
4. Check box for Use DesignWare Foundation Library
5. Set the Design Compiler Install Location. This should be the Synopsys folder that has subfolders dw, doc, libraries, etc.
6. Compile with Run → Run

sgherbst

// run simulation with xrun pll.sv +access+rw
// view results with simvision

`timescale 1s / 1fs

module ringosc (
    input real vdd,
    output logic out
);
    // YOUR CODE HERE

sgherbst

(NMOS_THKOX
  (NCSU_Devices_FreePDK45 NMOS_THKOX symbol)
  (
      (d D)
      (g G)
      (s S)
      (b B)
  )
)
(NMOS_VTG

sgherbst

Prerequisites

1. If you haven't already, create a free Xilinx account.

Installing Vivado HLx 2018.3

1. On your local machine, download the Vivado HLx 2018.3 Linux Self Extracting Web Installer.
2. Make the Vivado installer executable and run it:

> chmod +x Xilinx_*.bin
> sudo ./Xilinx_*.bin