revert the BIOS fix that disables L3 caching on AMD processors with the TLB cache coherency bug (early Phenoms of B1 and B2 stepping, long obsolete, kept for historical reasons)

tlb.sh

#!/bin/bash

MSR1=0xC0010015
MSR2=0xC0011023

# revert the BIOS fix that disables L3 caching on AMD processors
# with the TLB cache coherency bug (early Phenoms before the B3 stepping)

# needs msr-tools package

if [ ! -d /dev/cpu/0 ]; then
    modprobe msr
fi

for i in /dev/cpu/*; do
    CPU=$(basename $i)

    if [ $CPU = "microcode" ]; then
        echo Skipping... $CPU
        continue
    fi

    VAL=$(rdmsr -p $CPU -u $MSR1)

    if [ $VAL -eq 16777232 ]; then
        echo CPU $CPU already set to $VAL
        continue
    fi

    echo CPU $CPU is $VAL
    wrmsr -p $CPU $MSR1 $(( VAL &= ~(1 << 3) ))
    VAL=$(rdmsr -p $CPU -u $MSR2)
    echo CPU $CPU is $VAL
    wrmsr -p $CPU $MSR2 $(( VAL &= ~(1 << 1) ))
done

# unload all modules we do not need

for MODULE in "hfs" "hfsplus" "ufs" "qnx4" "ntfs" "minix" "msdos" "xfs" "jfs" "btrfs" "zstd_compress" "xor" "raid6_pq" "pata_amd" "pata_acpi" "joydev" "parport_pc" "ppdev" "kvm" "lp" "parport" "bpfilter" "ccp" "iptable_filter" "ip_tables" "x_tables"; do
    if lsmod | grep "$MODULE" &> /dev/null ; then
      rmmod $MODULE
      echo "Unloaded $MODULE"
    fi
done