Skip to content

Instantly share code, notes, and snippets.

LAK132 / Makefile
Last active Jan 7, 2021
Makefile but it uses Tiny C Compiler to open an Xlib/GLX window
View Makefile
#if 0
ifneq ($(shell grep -a -h -i microsoft /proc/version),)
# // For use on Windows (WSL) with cygwinX
# // Requires xinit, xauth and xhost probably
# // Start the X11 server with `path\to\cygwin64\bin\run.exe --quote /usr/bin/bash.exe -l -c "cd; exec /usr/bin/startxwin -- +iglx -listen tcp"`
# // If you get "Authorization required, but no authorization protocol specified"
# // then try running `DISPLAY=:0.0 xhost +` in the cygwin terminal after
# // starting the X11 server.
DISPLAY = "`cat /etc/resolv.conf | grep nameserver | awk '{ print $$2 }'`:0.0"


This document was originally written several years ago. At the time I was working as an execution core verification engineer at Arm. The following points are coloured heavily by working in and around the execution cores of various processors. Apply a pinch of salt; points contain varying degrees of opinion.

It is still my opinion that RISC-V could be much better designed; though I will also say that if I was building a 32 or 64-bit CPU today I'd likely implement the architecture to benefit from the existing tooling.

Mostly based upon the RISC-V ISA spec v2.0. Some updates have been made for v2.2

Original Foreword: Some Opinion

The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and

import contextlib
def lennyface():
global print
oldprint = print
def new_print(*args, **kwargs):
#newargs = [a.replace(' ', '( ͡° ͜ʖ ͡°)') for a in args]
args = list(args)