timokroeger

// packet request 1: parity with counter and intermediate reg
// 20 instructions, max swd freq clk/4

.side_set 1

    set pins, 1 side 0 // start
    set x, 3 side 0

reload_even:
    out y, 1 side 1

timokroeger

use core::future::Future;

use embassy_nrf::{gpio, spim};
use embedded_hal::digital::v2::OutputPin;
use gpio::{AnyPin, Output};

pub struct SpiWrapper<Spim>
where
    Spim: spim::Instance,
{

timokroeger

//! Experiments with async on embedded. This code runs on nRF52840-DK.
//!
//! On ARM Cortex-M cores interrupt requests can wake up the processor even when
//! interrupts are disabled by a critical section. The executor runs in a critical
//! section and puts the processor to sleep when no futures is ready.
//! A pending interrupt request wakes up the processor (without jumping to the ISR)
//! and the executor re-polls the futures for completion.
//!
//! Only supports a single task called `main_async` which can never be
//! interrupted (bus faults and other exceptions disregarded).

timokroeger

#![no_std]

mod message;

use core::{fmt, task::Poll};
use embedded_hal::blocking::serial::Write;
pub use message::*;

#[derive(Copy, Clone, PartialEq, Debug)]
enum Command {

timokroeger

use std::marker::PhantomData;

fn main() {
    let parts = Parts::new();

    // Disabled by default
    let pa0: Pin<_, Disabled> = parts.pa0.into();

    // Pull-up input
    let pa1: Pin<_, Input> = parts.pa1.pull_up().into();