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An example of an allowed outcome not explained solely by StoreLoad reordering (i.e., could not occur on | |
a system with a total store order and only StoreLoad reordering). | |
all memory initially zero | |
thread 1: | |
mov [x], 1 | |
mov a, [x] | |
mov b, [y] | |
thread 2: | |
mox [y], 1 | |
mov c, [y] | |
mov d, [x] | |
allowed: a == 1 && b == 0 && c == 1 && d == 0 |
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