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vietlq / EitherAsmAnalysis.cpp
Created Sep 6, 2019 — forked from nikhedonia/EitherAsmAnalysis.cpp
analysing Assembly generated by Eithers
View EitherAsmAnalysis.cpp
#include <type_traits>
template<class L>
struct Left {
L const value;
};
template<class R>
struct Right {
R const value;
@vietlq
vietlq / pgo.sh
Created May 28, 2019 — forked from daniel-j-h/pgo.sh
pgo: profile guided optimization with gcc
View pgo.sh
# Instrument binaries, pgo data to /data/pgo, serial make is important to not confuse the pgo generator
env CXXFLAGS='-march=native -fprofile-dir=/data/pgo -fprofile-generate=/data/pgo' cmake .. -DCMAKE_BUILD_TYPE=Release
make -j 1
# Run instrumented program, generate and write pgo data
./runIt
# Use profile data and feed into gcc, correct for threading counter noise, serial make is important to not confuse the pgo generator
env CXXFLAGS='-march=native -fprofile-dir=/data/pgo -fprofile-use=/data/pgo -fprofile-correction' cmake .. -DCMAKE_BUILD_TYPE=Release
make -j 1
View spreadsheet.mli
module type CELL = sig
type 'a cell
type 'a exp
val return : 'a -> 'a exp
val (>>=) : 'a exp -> ('a -> 'b exp) -> 'b exp
val cell : 'a exp -> 'a cell exp
val get : 'a cell -> 'a exp
View Python Turtle Fractal Plant.py
# As described in http://en.wikipedia.org/wiki/L-system#Example_7:_Fractal_plant
import turtle
ruleInput = ['F', 'X']
ruleOutput = ["FF", "F-[[X]+X]+F[+FX]-X"]
start = "X"
front = 5
turn = 30
stack = []
@vietlq
vietlq / advanced_honeycomb.py
Created Apr 28, 2019 — forked from utstikkar/advanced_honeycomb.py
python turtle advanced honeycomb sourcecode (Lasse Kosiol)
View advanced_honeycomb.py
# turtle honeycomb
# Lasse Kosiol
# 1.9.2012
# python workshop opentechschool berlin
import turtle
from random import randint
size = 20
circles = 20
@vietlq
vietlq / latency.txt
Created Apr 18, 2019 — forked from jboner/latency.txt
Latency Numbers Every Programmer Should Know
View latency.txt
Latency Comparison Numbers (~2012)
----------------------------------
L1 cache reference 0.5 ns
Branch mispredict 5 ns
L2 cache reference 7 ns 14x L1 cache
Mutex lock/unlock 25 ns
Main memory reference 100 ns 20x L2 cache, 200x L1 cache
Compress 1K bytes with Zippy 3,000 ns 3 us
Send 1K bytes over 1 Gbps network 10,000 ns 10 us
Read 4K randomly from SSD* 150,000 ns 150 us ~1GB/sec SSD
@vietlq
vietlq / .travis-ci.sh
Created Nov 12, 2018 — forked from avsm/.travis-ci.sh
Sample Travis setup for OCaml projects
View .travis-ci.sh
# Edit this for your own project dependencies
OPAM_DEPENDS="ocamlfind ounit re"
case "$OCAML_VERSION,$OPAM_VERSION" in
3.12.1,1.0.0) ppa=avsm/ocaml312+opam10 ;;
3.12.1,1.1.0) ppa=avsm/ocaml312+opam11 ;;
4.00.1,1.0.0) ppa=avsm/ocaml40+opam10 ;;
4.00.1,1.1.0) ppa=avsm/ocaml40+opam11 ;;
4.01.0,1.0.0) ppa=avsm/ocaml41+opam10 ;;
4.01.0,1.1.0) ppa=avsm/ocaml41+opam11 ;;
@vietlq
vietlq / pipes.ml
Created Sep 26, 2018 — forked from rizo/pipes.ml
Coroutine pipes in OCaml. Slides: <http://odis.io/talks/ocaml-coro.pdf>
View pipes.ml
type void
(* Core pipe type *)
type ('a, 'b, 'r) pipe =
| Yield of ('b * (unit -> ('a, 'b, 'r) pipe))
| Await of ('a -> ('a, 'b, 'r) pipe)
| Ready of 'r
View bipschnorr-Multisignature.md