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yupferris/led_test.sdc

Last active September 5, 2019 17:11
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Simplest possible .sdc for future reference
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led_test.sdc
create_clock -name max10_clk_50 -period 20 [get_ports {max10_clk_50}]
# Note - can use `derive_pll_clocks -create_base_clocks` without specifying input clocks to derive everything when PLL's are used for all clocks
derive_pll_clocks
derive_clock_uncertainty
# Don't constrain async reset signal
set_false_path -from [get_ports {reset_n}] -to [all_registers]
# Don't constrain LED output
set_false_path -from [all_registers] -to [get_ports {leds*}]
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