Created
June 20, 2018 02:19
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shader: MESA_SHADER_FRAGMENT | |
name: GLSL3 | |
inputs: 6 | |
outputs: 1 | |
uniforms: 1 | |
shared: 0 | |
decl_var uniform INTERP_MODE_NONE samplerExternalOES uTex (3, 0, 0) | |
decl_var shader_in INTERP_MODE_NONE float vVaryingColor (VARYING_SLOT_VAR9.x, 0, 0) | |
decl_var shader_in INTERP_MODE_NONE float vVaryingColor@0 (VARYING_SLOT_VAR9.y, 0, 0) | |
decl_var shader_in INTERP_MODE_NONE float vVaryingColor@1 (VARYING_SLOT_VAR9.z, 0, 0) | |
decl_var shader_in INTERP_MODE_NONE float vVaryingColor@2 (VARYING_SLOT_VAR9.w, 0, 0) | |
decl_var shader_in INTERP_MODE_NONE float packed:vTexCoord (VARYING_SLOT_VAR10.x, 1, 0) | |
decl_var shader_in INTERP_MODE_NONE float packed:vTexCoord@3 (VARYING_SLOT_VAR10.y, 1, 0) | |
decl_var shader_out INTERP_MODE_NONE vec4 gl_FragColor (FRAG_RESULT_COLOR, 0, 0) | |
decl_function main returning void | |
impl main { | |
decl_reg vec2 32 r0 | |
decl_reg vec4 32 r1 | |
block block_0: | |
/* preds: */ | |
vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */) | |
vec1 32 ssa_1 = intrinsic load_input (ssa_0) () (0, 0) /* base=0 */ /* component=0 */ /* vVaryingColor */ | |
vec1 32 ssa_2 = intrinsic load_input (ssa_0) () (0, 1) /* base=0 */ /* component=1 */ /* vVaryingColor */ | |
vec1 32 ssa_3 = intrinsic load_input (ssa_0) () (0, 2) /* base=0 */ /* component=2 */ /* vVaryingColor */ | |
vec1 32 ssa_4 = intrinsic load_input (ssa_0) () (0, 3) /* base=0 */ /* component=3 */ /* vVaryingColor */ | |
vec1 32 ssa_5 = intrinsic load_input (ssa_0) () (1, 0) /* base=1 */ /* component=0 */ /* packed:vTexCoord */ | |
vec1 32 ssa_6 = intrinsic load_input (ssa_0) () (1, 1) /* base=1 */ /* component=1 */ /* packed:vTexCoord */ | |
r0.x = imov ssa_5 | |
r0.y = imov ssa_6.x | |
vec4 32 ssa_8 = tex r0 (coord), 0 (texture) 0 (sampler) | |
r1.x = fmul ssa_1, ssa_8.x | |
r1.y = fmul ssa_2.x, ssa_8.y | |
r1.z = fmul ssa_3.x, ssa_8.z | |
r1.w = fmul ssa_4.x, ssa_8.w | |
intrinsic store_output (r1, ssa_0) () (0, 15, 0) /* base=0 */ /* wrmask=xyzw */ /* component=0 */ /* gl_FragColor */ | |
/* succs: block_0 */ | |
block block_0: | |
} | |
========prog======== | |
-------block------ | |
const 0 ssa0 | |
st_col 14 new | |
mul 10 reg1 | |
ld_var 1 ssa1 | |
ld_tex 9 ssa8 | |
mov 7 reg0 | |
ld_var 5 ssa5 | |
mov 8 reg0 | |
ld_var 6 ssa6 | |
mul 11 reg1 | |
ld_var 2 ssa2 | |
+ld_tex 9 ssa8 | |
mul 12 reg1 | |
ld_var 3 ssa3 | |
+ld_tex 9 ssa8 | |
mul 13 reg1 | |
ld_var 4 ssa4 | |
+ld_tex 9 ssa8 | |
==================== | |
ppir: ppir_lower_texture create load_coords node 15 for 9 | |
========prog======== | |
-------block------ | |
st_col 14 new | |
mul 10 reg1 | |
ld_var 1 ssa1 | |
ld_tex 9 ssa8 | |
ld_coords 15 new | |
mov 7 reg0 | |
ld_var 5 ssa5 | |
mov 8 reg0 | |
ld_var 6 ssa6 | |
mul 11 reg1 | |
ld_var 2 ssa2 | |
+ld_tex 9 ssa8 | |
mul 12 reg1 | |
ld_var 3 ssa3 | |
+ld_tex 9 ssa8 | |
mul 13 reg1 | |
ld_var 4 ssa4 | |
+ld_tex 9 ssa8 | |
==================== | |
ppir: node_to_instr create move 16 from store 14 | |
ppir: insert_load_tex: create move 17 for 9 | |
======ppir instr list====== | |
vary texl unif vmul smul vadd sadd comb stor const0|1 | |
*000: null null null null null 16 null null null | | |
001: null null null null 10 null null null null | | |
002: 1 null null null null null null null null | | |
003: null null null null 11 null null null null | | |
004: 2 null null null null null null null null | | |
005: null null null null 12 null null null null | | |
006: 3 null null null null null null null null | | |
007: null null null null 13 null null null null | | |
008: 4 null null null null null null null null | | |
009: 15 9 null null null 17 null null null | | |
010: null null null null null null 7 null null | | |
011: 5 null null null null null null null null | | |
012: null null null null null null 8 null null | | |
013: 6 null null null null null null null null | | |
------------------------ | |
======ppir instr depend====== | |
[0[1[2][9[10[11]][12[13]]]][3[4][+9]][5[6][+9]][7[8][+9]]] | |
------------------------ | |
======ppir regalloc result====== | |
011: (5|0|) | |
010: (7|0|0) | |
013: (6|4|) | |
012: (8|0|4) | |
009: (15|60|0) (9|56|60) (17|8|56) | |
002: (1|0|) | |
001: (10|0|0 8) | |
004: (2|4|) | |
003: (11|0|4 8) | |
006: (3|4|) | |
005: (12|0|4 8) | |
008: (4|4|) | |
007: (13|0|4 8) | |
000: (16|0|0) | |
-------------------------- | |
========ppir codegen======== | |
011: 02100083 10103c00 00000000 | |
010: 02182002 3e400000 | |
013: 02100083 11143c00 00000000 | |
012: 02302002 3e410004 | |
009: 021811c6 3f040004 00000000 39001000 20000e4e 000007cf | |
002: 02100083 10003c00 00000000 | |
001: 02180802 00400800 | |
004: 02100083 11043c00 00000000 | |
003: 02180802 00410904 | |
006: 02100083 11083c00 00000000 | |
005: 02180802 00420a04 | |
008: 02100083 110c3c00 00000000 | |
007: 02180802 00430b04 | |
000: 00001023 00000e40 000007cf | |
----------------------- |
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