jblang

#
# Copyright (C) 2011-2013 Michael Vogt <michu@neophob.com>
#
# This file is part of PixelController.
#
# PixelController is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#

jblang

;
; **** ZP FIELDS **** 
;
f24 = $24
RESHO = $26
FRETOP = $33
CAS1 = $C0
CURCMD = $C1
CURCMDH = $C2
;

jblang

hello   
/ above: title line - was punched in human readable letters on paper tape
/ below: location specifier - told assembler what address to assemble to
100/
lup,	lac i ptr		/ load ac from address stored in pointer
	cli			/ clear io register
lu2,	rcl 6s			/ rotate combined ac + io reg 6 bits to the left
				/ left 6 bits in ac move into right 6 bits of io reg
	tyo			/ type out character in 6 right-most bits of io reg
	sza			/ skip next instr if accumulator is zero

jblang

#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <sys/stat.h>

#define MEMSIZ 64*1024
#define GETLOC 0x20

uint16_t get, put;
uint8_t cur, mem[MEMSIZ];

jblang

C:\Users\jblang\Retro\DEC\PDP1>macro1 -s hello.mac
hello    - pass 1
hello    - pass 2

C:\Users\jblang\Retro\DEC\PDP1>pdp1

PDP-1 simulator V4.0-0 Beta        git commit id: ea898b24
sim> att ptr hello.rim
sim> boot ptr
hello, world

jblang

leds = $D000
dips = $D001

* = $F000

begin	lda dips
	sta leds
	jmp begin

* = $FFFA

jblang

module ram(clk, addr, data_in, data_out, cs, we);
 
parameter ADDR_WIDTH = 11;
parameter DATA_WIDTH = 8;
parameter INIT_FILE = "";

input clk;
input [ADDR_WIDTH-1:0] addr;
input [DATA_WIDTH-1:0] data_in;
output [DATA_WIDTH-1:0] data_out;

jblang

module cpu_tb;

reg clk;
reg reset;
reg irq;
reg nmi;
reg rdy;

wire [15:0] addr;
wire [7:0] cpu_do;

jblang

module ram(clk, addr, data_in, data_out, cs, we);
 
parameter ADDR_WIDTH = 11;
parameter DATA_WIDTH = 8;
parameter INIT_FILE = "";

input clk;
input [ADDR_WIDTH-1:0] addr;
input [DATA_WIDTH-1:0] data_in;
output reg [DATA_WIDTH-1:0] data_out;

jblang

#define bytesPerLine 16
#define dataSize 131072
#define A16 10
#define _CE 11
#define _OE 12
#define _WE 13

void setupPorts() {
  // Set disable writing and output, enable chip
  digitalWrite(_WE, HIGH);