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open Lwt | |
let block_size = 256 * 4096 | |
let ifd = Lwt_unix.stdin | |
let ofd = Lwt_unix.stdout | |
let print spd = | |
try_lwt | |
Lwt_io.eprintf "%s\r" (Speed.to_string spd) | |
with Speed.Undefined -> return_unit |
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open Core_kernel | |
open Bap.Std | |
open Bap_primus.Std | |
open Bap_plugins.Std | |
open Monads.Std | |
open Format | |
let empty_project arch = | |
let nil = Memmap.empty in | |
Project.Input.create arch "/bin/true" ~code:nil ~data:nil |> |
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open Bap.Std | |
open Core_kernel | |
open Bap_main | |
module Unix = UnixLabels | |
type chunk = { | |
offset : int; | |
data : Bigstring.t | |
} |
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let of_int_exn = function | |
| 0 -> `EQ | |
| 1 -> `NE | |
| 2 -> `CS | |
| 3 -> `CC | |
| 4 -> `MI | |
| 5 -> `PL | |
| 6 -> `VS | |
| 7 -> `VC | |
| 8 -> `HI |
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(declare (context (target arm))) | |
(in-package thumb) | |
(defun t2STMDB_UPD (dst base _pred _? | |
r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15) | |
(stmdb_upd dst base r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15)) | |
(defun t2STMDB_UPD (dst base _pred _? | |
r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14) |
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open Core_kernel | |
open Bap.Std | |
open Bap_core_theory | |
open Bap_main | |
open Bap_primus.Std | |
open KB.Syntax | |
let show name = | |
Toplevel.exec @@ begin |
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open Core_kernel | |
open Bap_main | |
open Bap_knowledge | |
open Bap_core_theory | |
open Bap.Std | |
open KB.Syntax | |
let zero_collector = object | |
inherit [Tid.Set.t] Term.visitor |
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open Core_kernel | |
open Bap_core_theory | |
open Bap.Std | |
open KB.Syntax | |
include Self() | |
let package = "bytoy" | |
type name = string [@@deriving equal,sexp] | |
type oper = Reg of int | Imm of int [@@deriving equal,sexp] |
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open Core_kernel | |
open Bap_core_theory | |
open Bap.Std | |
open KB.Syntax | |
include Self() | |
module Word = struct | |
include Bitvec_order | |
include Bitvec_sexp.Functions | |
end |
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open Core_kernel.Std | |
open Bap.Std | |
open Or_error.Monad_infix | |
module Insn = Disasm_expert.Basic.Insn | |
module Mips = struct | |
(** Defines the register map *) | |
module CPU = struct | |
let mem = Var.create "mem" @@ mem32_t `r8 |
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