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Masanori Ogino omasanori

  • Japan, or anywhere else
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View gist:c1da433406807255f9aa835d72976470
wpa_supplicant -B -i interface -c <(wpa_passphrase 'SSID' 'key').
parted /dev/nvme0n1 -- mklabel gpt
parted /dev/nvme0n1 -- mkpart primary 512MiB -0
parted /dev/nvme0n1 -- mkpart ESP fat32 1MiB 512MiB
parted /dev/nvme0n1 -- set 2 esp on
cryptsetup luksFormat /dev/nvme0n1p1
View cpu/intel/ Use correct Kconfig symbols sb/intel/lynxpoint: Use common code to generate HPET table sb/intel/lynxpoint: Drop unnecessary 'UL' suffix {cpu,nb}/intel/haswell: Drop unnecessary 'UL' suffix sb/intel/lynxpoint/lpc.c: Simplify PM init sequence sb/intel/lynxpoint: Align with Broadwell azalia: Treat all negative return values as errors azalia: Use 'HDA_GCTL_CRST' macro as unset-mask Revert "broadwell: Switch to using common ACPI _SWS code" soc/intel/broadwell/gma.c: Align struct with Haswell

View Pixiv Fanbox Downloader.js
// ==UserScript==
// @name Pixiv Fanbox Downloader
// @version 0.9
// @description Download Pixiv Fanbox images and files.
// @icon
// @author Mike Lei
// @match https://**
// @require
// @grant GM_download
// ==/UserScript==
kesor / Dockerfile
Last active Jul 29, 2022
Compile DENO on Alpine (w/MUSL C)
View Dockerfile
FROM rust:alpine
RUN apk add --no-cache \
bash \
binutils-gold \
ca-certificates \
clang \
curl \
g++ \
git \
View webrtc_now.rst
unarist / mastodon-hide-private.user.css
Created Jan 1, 2019
Mastodon - Hide private posts
View mastodon-hide-private.user.css
/* ==UserStyle==
@name Mastodon - Hide private posts
@version 1.0.0
@description Hide private posts from timeline
@author unarist
==/UserStyle== */
@-moz-document regexp("^https://[^/]+/web/.*") {
/* :not(.muted) filters notification */
kazuho /
Last active Jun 28, 2022
git-blame by PR #
#! /usr/bin/perl
# Written in 2017 by Kazuho Oku
# To the extent possible under law, the author(s) have dedicated all copyright and related and neighboring rights to this software to the public domain worldwide. This software is distributed without any warranty.
# You should have received a copy of the CC0 Public Domain Dedication along with this software. If not, see <>.
use strict;
use warnings;
ArthurHeymans /
Last active Apr 4, 2021
How to flash coreboot properly on Thinkpad X60

How to flash coreboot to the thinkpad x60 the proper way

-> is more up to date

What is so special about the x60 when running vendor bios?

Vendor BIOS write protects its bootblock, which means the lowest 64K of the flash can't be modified

This is a problem since the first code that runs on the CPU comes from there and if we ever want to run coreboot the cpu must start with coreboot code. This write protection is set in the PBR (protect bios range) registers on the southbridge, there is currently no known way to change them back once they are locked by setting the SPI Configuration Lock-Down bit.

View commonssids.txt
<no ssid>
martijnvermaat /
Last active Jul 22, 2022
Installation of NixOS with encrypted root