Each neuron consists of SRAM and a small programmable logic unit. The logic is prewired to run certrain types of algorithms. Neurons are interconnected using a small bidir bus.
Released in 2007. Follow up to IBM ZISC chip. ZISC refers to an architecture based solely on pattern matching and the abscense of micro-instructions. A single ZISC036 holds 36 neurons to implement an RBF network trained with the RCE (or ROI) algorithm.
ZISC employs Radial Basis Function (RBF) and K-Nearest Neighbor (KNN) algorithms. ZISC approach is a specialized but cheap chip to do one thing very quickly.
- RBF: Real-valued function whose value depends only on the distance from the origin. Used as a kernel in support vector classification. Can be interpreted as a simple single-layer type of ANN.
- KNN: Stores all avalable cases and classifies new cases based on a similarly measure (e.g. distance function). Used in statistical estimation and pattern recognition.