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`timescale 1ns / 1ps | |
////////////////////////////////////////////////////////////////////////////////// | |
// Company: | |
// Engineer: | |
// | |
// Create Date: 09:31:39 09/10/2013 | |
// Design Name: | |
// Module Name: count_sec | |
// Project Name: | |
// Target Devices: |
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`timescale 1ns / 1ps | |
////////////////////////////////////////////////////////////////////////////////// | |
// Company: | |
// Engineer: | |
// | |
// Create Date: 10:30:49 09/10/2013 | |
// Design Name: | |
// Module Name: rategen | |
// Project Name: | |
// Target Devices: |
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`timescale 1ns / 1ps | |
////////////////////////////////////////////////////////////////////////////////// | |
// Company: | |
// Engineer: M.Yasir | |
// Create Date: 13:55:43 02/11/2011 | |
// Design Name: | |
// Module Name: UART_Tx | |
// Project Name: | |
// Target Devices: |
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`timescale 1ns / 1ps | |
////////////////////////////////////////////////////////////////////////////////// | |
// Engineers: Toth Andras / Szell Andras | |
// | |
// Create Date: 11:42:27 10/06/2013 | |
// Module Name: uart | |
// Project Name: MeresLabor1 HF | |
// Description: | |
// Soros adó egység (UART) | |
// |
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`timescale 1ns / 1ps | |
////////////////////////////////////////////////////////////////////////////////// | |
// Engineers: Toth Andras / Szell Andras | |
// | |
// Create Date: 11:42:27 10/06/2013 | |
// Module Name: uart | |
// Project Name: MeresLabor1 HF | |
// Description: | |
// Soros adó egység (UART) |
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`timescale 1ns / 1ps | |
module spi_temp( | |
input clk, | |
input rst, | |
output cs, | |
output sck, | |
input so, | |
output [12:0] temp, | |
output DBG_CS, |
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# | |
#Edition of used I/O line: | |
# #NET "" --> NET "Signal_name" | |
# #NET "" --> NET "Signal_name<i>" | |
# | |
# FPGA system clock: | |
#------------------- | |
# Signal FPGA Comment |
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/* | |
* fordit.c | |
* Egész számokat olvas be egy listába, majd fordított | |
* sorrendben kiírja azokat. | |
* | |
*/ | |
#include <iostream> | |
using namespace std; |
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;*************************************************************** | |
;* Feladat: | |
;* Rövid leírás: | |
; | |
;* Szerzõk: | |
;* Mérõcsoport: <merocsoport jele> | |
; | |
;*************************************************************** | |
;* "AVR ExperimentBoard" port assignment information: | |
;*************************************************************** |
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;*************************************************************** | |
;* Feladat: LED léptetése | |
;* Rövid leírás: | |
; | |
;* Szerzők: Tóth András | |
;* Mérőcsoport: CDE10 | |
; | |
;*************************************************************** | |
;* "AVR ExperimentBoard" port assignment information: | |
;*************************************************************** |
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