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The conversation that led to the creation of the channel:
<ferram4|afk> So, I continue following references on supersonic wing stuff,
and I find a paper that tries to tweak linear supersonic flow to work for
high AoA, hypersonic flight.
<KinglyRedLion> the FUCK
<ferram4|afk> I love technical papers. ^_^
<KinglyRedLion> Why would you do high AOA hypersonic?
<egg|zzz|egg> KinglyRedLion: to publish
General architecture for a hardware model checking tool
Key Principles
Things should feel real time
Solvers should be able to communicate between threads rapidly for clause
sharing, solver shutdown etc
Main thread should be only used for comms between/launching threads,
UI/user scripts should run in their own thread so you don't get the case
where e.g. you can't load a CEX while a script is running
Users should have the power to control proof performance in sound and intuitive
This document was originally written several years ago. At the time I was working as an execution core verification engineer at Arm. The following points are coloured heavily by working in and around the execution cores of various processors. Apply a pinch of salt; points contain varying degrees of opinion.
It is still my opinion that RISC-V could be much better designed; though I will also say that if I was building a 32 or 64-bit CPU today I'd likely implement the architecture to benefit from the existing tooling.
Mostly based upon the RISC-V ISA spec v2.0. Some updates have been made for v2.2
Original Foreword: Some Opinion
The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and
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A curated list of research papers and blog posts on embedded security, keyed by the device p/n
The list below is compiled to inform, guide, and inspire budding security researchers. Oh and to pick something for bedtime reading too.
Included in the list are works on the following topics related to MCU/SoC security:
Secure boot
Fault injection
Side channel attacks
At the end of the list, there is also a section with links to articles of potential general interest, not addressing vulnerabilities in any specific device.